This invention relates generally to direct conversion radio receivers for frequency modulated (FM) signals and, more particularly, to a direct conversion receiver for processing analog information.
Direct conversion or "zero IF" receivers for FM signals are known in the art and are amply described in publications such as Proc. IRE 44(1956), pages 1703-1705, and U.S. Pat. No. 2,928,055, which are incorporated herein by reference. In a direct conversion receiver, a received FM signal is mixed with the output of a down conversion oscillator to translate the received signal to baseband. Equal positive and negative frequency excursions about the carrier frequency result in the same deviation frequency, but the polarity of the modulation can no longer be determined without some phase of reference. To provide that reference, two substantially identical signal paths known as I+Q paths are provided in which the received signal is down converted to baseband, low-pass filtered to remove the sum products of mixing as well as undesired adjacent channel signals, and up converted to an output frequency. The down- and up-conversion oscillators for one path are in phase quadrature with their counterparts in the other path. The two successive frequency conversions produce phase conversions between the side bands of the signals in the two paths. When the outputs of the two paths are then summed, the side bands cancel in such a manner that the modulation polarity of the original received signal is retained, though translated to a new, predetermined output frequency. In effect, the received signal is translated from an incoming frequency to baseband, filtered to remove interfering adjacent signals, and reconverted to an output frequency in which conventional FM demodulation can take place.
Direct conversion receivers have the advantage of smaller size over conventional superheterodyne receivers. A superheterodyne receiver converts an incoming radio signal to one or more intermediate frequencies in which amplification and frequency selection are more easily performed than at the frequency of the received signal. Typically, the carrier frequency of the signal is converted twice or three times in successive stages for demodulation of the signal. The intermediate frequency is selected at each stage through a bandpass filter. It has proven difficult, however, to miniaturize superheterodyne receivers because high-Q crystal or ceramic bandpass filters cannot be easily integrated in monolithic form. Direct conversion receivers, on the other hand, can be miniaturized because frequency selectivity is achieved through low-pass filtering. Low-pass filters are readily fabricated in monolithic form.
Despite this apparent advantage, direct conversion receivers have a number of drawbacks that limit their use for processing analog information. Direct conversion receivers typically include several amplifiers subject to automatic gain control (AGC). This controlled amplification preserves linearity in the intermediate frequency (IF) so that the modulated signal is accurately recovered when the two signals are recombined. DC offsets inherent in the amplifiers and other elements of the receiver circuit, however, can cause the amplifiers to saturate. One recognized method for overcoming this problem is to AC couple the receiver elements to block their DC offsets. The AC coupling, though, creates a DC notch around zero frequency that dampens the lower frequencies. The portion of the modulated signal centered around the carrier frequency is thus lost when the modulated signal is translated to the zero IF. For signal modulation formats such as FM and SSB, the DC notch causes distortion, since the notch frequencies contain signal information. Moreover, with automatic gain control, the rest of the signal is overamplified to compensate for the lost signal within the notch. This additional amplification also distorts the received signal. For these and other reasons, direct conversion receivers are primarily used for processing digital information such as with frequency shift keying (FSK), where loss of the modulated signal portion about zero frequency is not critical.
Several variations on the described direct conversion receiver design have been tried for overcoming these drawbacks to analog use. For example, U.S. Pat. No. 4,653,117 teaches placement of amplification and limiting functions outside the dual signal paths at a nonzero intermediate frequency. Gain within the signal paths is thus intentionally avoided to prevent the need for AC coupling and the resultant partial loss and distortion of the demodulated signal. DC offsets are also minimized by the use of differential circuits in the zero IF. The drawback of this approach, however, is the need for additional circuitry to provide the needed gain. The use of differential amplifiers and the addition of amplifiers and limiters beyond the summing junction of the signal paths makes the receiver circuit somewhat larger and more complex to design and fabricate.
U.S. Pat. No. 4,653,117 also mentions the possibility of AC coupling combined with translating the input signal to a small offset frequency from zero, in the range of 10 to 100 Hz, to avoid the problems of DC offset. This small translation is an attempt to fit the DC notch between the line spectra of the frequency modulated signal, each line separated by the modulating signal frequency range. This approach has several drawbacks. For one, the frequency range between line spectra is narrow and thus the notch must be placed precisely within that range. Such accuracy requires a frequency synthesizer rather than a more economical but less precise automatic frequency control (AFC). For another, the notch must be narrow. A narrow notch requires a larger coupling capacitor than required for a broader notch. Such a larger capacitor is not as easily fabricated on chip. A larger capacitor also results in a longer time constant and thus a longer turn-on time for the receiver. For receivers that must turn on and off quickly, as in time-multiplexed communication systems, turn-on and turn-off time must be extremely short. The approach disclosed in Heck, therefore, is not sufficient where turn-on time and size are considerations.
DC coupling is also employed in direct conversion receivers described in U.S. Pat. Nos. 4,599,743; 4,476,585; and 4,677,690 for processing analog information. The problem of amplified DC offsets is apparently handled by keeping the gain within the dual signal paths low. The instantaneous amplitude and phase relationship between the two signals is maintained by a voltage controlled oscillator responsive to a stabilizing network. The overall circuit is complex and hence more difficult to fabricate in monolithic form.
U.S. Pat. No. 4,736,390 discloses a zero IF receiver that attempts to reduce the effect of DC offsets by modulating the local oscillator signal with a balanced pseudo-random phase code signal. The hoped-for effect of the phase code signal is to spread the spectrum which is associated with the offset. The receiver can therefore respond to the desired signal without interference from the DC offsets.